Data Capacity 15 Times Larger... World's First AI PIM Semiconductor Developed

KAIST Research Team

A domestic research team has developed an AI PIM semiconductor capable of processing 15 times more data than existing technologies.

Researchers at KAIST announced on the 14th that they have developed ‘DynaPlasia,’ a PIM semiconductor that integrates a computing unit directly inside DRAM memory cells for the first time in Korea, enabling AI computations with 15 times greater capacity than before.

DynaPlasia Demo
In the real-time object recognition system, the performance of the DynaPlasia chip can be optimized according to various artificial intelligence model architectures. Each artificial intelligence model (deep neural network) consists of multiple layers, and when the model architecture changes, the hardware architecture is adjusted to match each layer. Additionally, it can be observed that resources in memory and computation time dynamically switch according to the hardware architecture changes.
Image provided by KAIST

DynaPlasia is a compound word combining Dyna (dynamic, based on DRAM) and Plasia (forming a structure according to purpose). It signifies the ability to form hardware structures tailored to needs based on DRAM, allowing the processing of various AI models.

PIM (Processing-In-Memory) is a next-generation semiconductor that integrates memory and processor computing units within a single chip. It addresses data bottlenecks and excessive power consumption issues inherent in traditional computing architectures (von Neumann architecture), where memory and processors are separated.

Although PIM semiconductors have been developed previously, most used the SRAM-PIM method requiring more than eight transistors per cell, or were DRAM-based PIMs like existing PIMs (HBM-PIM, GDDR6-AiM, etc.) that placed computing units near but outside the memory cell array in a digital PIM (Near Memory PIM) approach. While this digital PIM method reduced data bottlenecks by shortening the distance between memory and computing units and increasing bandwidth, it did not improve computational performance by integrating computing units directly inside memory cells.

The DynaPlasia developed by the research team is an analog-type DRAM-PIM based AI semiconductor composed of cells with only three transistors. By integrating computing units inside memory cells and utilizing an analog computation method with high parallelism and energy efficiency, it dramatically enhances integration density and computational functionality. Through leakage current-tolerant computing, all memory cells can operate in parallel. Compared to existing digital DRAM-PIM methods, it demonstrates approximately 300 times higher parallelism and 15 times greater data throughput. Due to the nature of DRAM, where values inside memory cells gradually dissipate due to leakage current, implementing high-parallelism analog DRAM-PIM was previously difficult. The research team eliminated the effect of leakage current in the internal multiplication logic of the cell and performed analog computation to enable all memory cells to operate in parallel.

Additionally, while existing analog-type PIM semiconductors implemented memory, computing units, and analog-to-digital data converters separately with fixed hardware structures, the research team developed the world’s first ‘triple-mode cell’ that simultaneously supports the functions of memory, computing unit, and data converter within a single cell. Consequently, the dynamic core formation architecture, which forms hardware structures tailored to actual AI computations, achieves about 2.5 times higher efficiency than existing analog-type PIM semiconductors.

The research results were presented last month at the International Solid-State Circuits Conference (ISSCC) held in San Francisco, USA.

Professor Yoo Hwe-jun of KAIST’s Department of Electrical Engineering said, “This research is significant not only because it resolves the memory bottleneck in existing AI semiconductors but also because it developed a high-memory-capacity DRAM-PIM with high throughput and variability. If successfully commercialized, it will demonstrate high performance even in increasingly large and diverse AI models.”

This content was produced with the assistance of AI translation services.