'1 Jo Transistor Era'... Intel in Crisis Showcases Foundry Innovation Technology

Industry Targets '1 Trillion Transistors' by 2030
Intel Foundry to Showcase First Transistor and Packaging Innovations at IEDM 2024

Intel Foundry revealed new innovative technologies that will advance the semiconductor industry over the next decade at the 'International Electron Devices Meeting (IEDM) 2024' hosted by the Institute of Electrical and Electronics Engineers (IEEE).

Intel

According to industry sources on the 9th, Intel Foundry introduced a new material technology that improves chip interconnects and enhances capacitance by up to 25% using 'antiferroelectric ruthenium.' They also announced a 100-fold increase in throughput by leveraging heterogeneous integration solutions for advanced packaging that enable ultra-high-speed chip-to-chip assembly processes. This is an industry first. Additionally, to further promote scaling, they demonstrated efforts to improve device performance using silicon RibbonFET CMOS and gate oxide modules for scaled 2D FETs.

Sanjay Natarajan, Senior Vice President and General Manager of Intel Foundry Technology Research, stated, "Intel Foundry continuously strives to define and build the roadmap for the semiconductor industry. Recent innovations highlight Intel’s position and efforts to deliver cutting-edge technology developed in the U.S., supported by the U.S. CHIPS Act, while establishing a balanced global supply chain and restoring manufacturing and technology leadership within the United States."

The new technologies introduced by Intel Foundry were developed in line with the '1 trillion transistor era.' Recently, the semiconductor industry has set a goal to integrate 1 trillion transistors on a chip by 2030. Accordingly, Intel Foundry shared a call to action (CTA) for continuous transistor scaling in this announcement. They also explained how the development of transistors capable of ultra-low voltage operation (below 300 millivolts) contributes to resolving increasing thermal bottlenecks and dramatically improving energy consumption and heat generation.

Intel Foundry has been proposing various alternatives to expand interconnects for future nodes by addressing the anticipated limitations of copper transistors, improving existing assembly technologies, and continuously defining and refining transistor roadmaps for GAA scaling and beyond. They have also continuously advanced research through the industry’s first 300-millimeter (mm) gallium nitride (GaN) technology for power and radio frequency (RF) electronic devices, which offer higher performance than silicon and can withstand higher voltages and temperatures. This is the industry’s first high-performance scaled enhancement-mode GaN MOSHEMT (metal-oxide-semiconductor high-electron-mobility transistor), fabricated on a 300-mm GaN-on-TRSOI (“trap-rich” silicon-on-insulator) substrate. Advanced engineered substrates like GaN-on-TRSOI reduce signal loss, improve signal linearity, and enable advanced integrated systems through backside substrate processing, delivering better performance in applications such as RF and power electronic devices.

This content was produced with the assistance of AI translation services.