UNIST Builds Two-Dimensional Semiconductors Layer by Layer at Low Temperatures

A core technology for future semiconductor manufacturing processes that precisely stacks next-generation semiconductor materials at the atomic layer level has been developed.

It is expected to be applicable to various electronic devices due to its capability to be applied to nano-level three-dimensional structures even at low temperatures.

The research team led by Professor Seojun Ki from the Graduate School of Semiconductor Materials and Components and the Department of New Materials Engineering at UNIST, together with Professor Song Bonggeun from Hongik University and Professor Jung Hooyoung from UNIST, developed a thin film deposition process in which tellurium atoms are regularly arranged at a low temperature of 50 degrees Celsius using atomic layer deposition (ALD).

Atomic layer deposition is a next-generation thin film process method that enables thin and uniform film coating and precise thickness control on three-dimensional structures at low process temperatures.

For application to next-generation semiconductors such as atomic layer semiconductors, a typical process requires a deposition temperature above 250 degrees Celsius and additional heat treatment above 450 degrees Celsius.

The research team applied atomic layer deposition to the single-element atomic layer semiconductor 'Tellurium,' which is being studied in various fields such as electronic devices and thermoelectric materials, and successfully manufactured high-quality thin films at a low temperature of 50 degrees Celsius without heat treatment.

The manufactured thin films had atoms regularly arranged, thickness controllable below the nanometer scale (one-billionth of a meter), and were uniformly deposited on all surfaces.

To enhance reactivity at low temperatures, the research team utilized two precursors with acidic and basic properties. They additionally used co-reactants for high surface reactivity and stability and injected the precursors repeatedly at shorter intervals.

As a result, compared to the conventional method where low-density and discontinuous particles are deposited, they successfully produced dense and compact thin films.

Using the developed manufacturing process, tellurium thin films were applied to the entire 4-inch (100mm) wafer, achieving atomic layer-level thickness control and uniform deposition. It was also confirmed that deposition is possible on vertical three-dimensional structures required for high integration of devices.

Graphic image of the cover article published in ACS Nano.

Changhwan Kim, the first author of the study, said, “This research overcomes the limitations of existing thin film deposition methods and implements tellurium using a new deposition method called atomic layer deposition. Tellurium thin films can be uniformly deposited even on complex three-dimensional device structures, making them applicable to various electronic devices.”

Professor Seojun Ki from the Graduate School of Semiconductor Materials and Components and the Department of New Materials Engineering said, “This research satisfied all the key requirements in semiconductor deposition processes: low temperature, large area, and high-quality synthesis.”

He added, “By adding new process elements to traditional deposition methods, we succeeded in implementing ‘non-traditional’ two-dimensional new materials and new devices, which will enable various applied research.”

This research was published online on July 11 in the international journal in the field of nanoscience, ‘ACS Nano,’ and was selected as a cover paper in recognition of its achievements. The research was supported by the Ministry of Science and ICT through the National Research Foundation of Korea (including the Excellent New Research Project), the Korea Evaluation Institute of Industrial Technology, and the Korea Semiconductor Industry Association.

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