Development of 3D Integrated Semiconductor Devices for Quantum Computers

Professor Kim Sanghyun's Team at KAIST

[Asia Economy Reporter Kim Bong-su] A domestic research team has broken the limitations of existing semiconductor technology and developed logic circuit and core device technologies that can be used not only for next-generation high-integration and ultra-low-power semiconductors but also for quantum computers.

The National Research Foundation of Korea (NRF) announced on the 31st that Professor Kim Sang-hyun's research team at KAIST has developed three-dimensional logic devices and ultra-low-power semiconductor devices and circuit technologies operating at cryogenic temperatures that overcome the limitations of existing CMOS-based logic devices. These are expected to be used as core devices for next-generation semiconductors such as low-power CMOS logic circuits and large-scale quantum computers operating at cryogenic temperatures.

Logic semiconductor devices have improved integration and performance through device miniaturization process technology development, but physical limitations have made further miniaturization difficult. In addition, the reduction in wiring linewidth due to device miniaturization and the resulting increase in wiring resistance and power consumption have posed dual challenges to performance improvement.

Schematic diagram of an ultra-low resistance routing circuit using InGaAs. Image courtesy of KAIST

Monolithic 3D integration technology (M3D) is attracting attention as next-generation semiconductor technology to overcome these limitations. Unlike conventional stacking technology, it stacks a single circuit in three dimensions to increase integration while drastically reducing wiring resistance connecting devices. High-performance new materials can also be introduced in the upper channel. However, since heat is continuously applied during stacking and upper device processes, lower-layer devices are easily damaged, making the process very challenging.

Meanwhile, quantum computers using superconductors or silicon (Si) quantum dots operate at cryogenic temperatures and are connected by tens of thousands of circuits, unlike conventional computers. Therefore, low-noise amplifier devices used in quantum computers must operate at cryogenic temperatures with minimal heat generation and must be implemented as ultra-low-power devices.

The research team developed high-performance germanium/silicon (Ge/Si) hybrid CFETs (complementary field-effect transistors) through monolithic 3D integration technology, along with semiconductor devices and circuits that operate at cryogenic temperatures with high integration and ultra-low power consumption. They developed an original low-temperature process that suppresses the high process temperatures required during stacking and device fabrication, overcoming the limitations of existing monolithic 3D integration technology. Through process and Ge’s intrinsic band structure engineering, they also succeeded in realizing hole mobility, which represents semiconductor device performance, at the world’s highest level. To control and read tens of thousands of qubits required by large-scale quantum computers with a small number of devices and wiring, they created low-resistance, ultra-low-power, low-noise amplifier devices and routing devices operating at cryogenic temperatures.

Professor Kim said, "It is expected to be widely used in the development of devices for quantum computers and to significantly improve technical performance in existing logic devices," adding, "It is meaningful that we developed next-generation semiconductor technology that maximizes performance by overcoming the technical limitations of existing semiconductors. We will strive for follow-up research so that it can be widely used as a core device for next-generation logic and quantum computers.”

The research results were presented in two papers at the International Electron Device Meetings (IEDM).

This content was produced with the assistance of AI translation services.