Shaking the Foundry Market with 'Packaging'... TSMC, Intel, and Samsung's Battle for the Throne (Comprehensive)

TSMC Operates 6 Packaging Plants Only in Taiwan
Intel's Packaging Investment Scale Reaches 'World's Largest' Level
Samsung Electronics Establishes 'Advanced Package Team'

A researcher is showcasing an MPW test chip in the 12-inch semiconductor testbed cleanroom at the Daejeon Nano Convergence Technology Institute. It is forecasted that the global semiconductor shortage will continue until mid-next year. As the local industry in the region, which is pursuing a semiconductor ecosystem advancement strategy, faces potential impacts from this trend, attention is focused on how it will respond. Meanwhile, countries around the world are rolling out their countermeasures one after another. Our government is also accelerating efforts to advance the semiconductor ecosystem. Through the "K-Semiconductor Strategy Report," the government envisions a leap to becoming a comprehensive semiconductor powerhouse by 2030, aiming to complete semiconductor localization through massive investments and tax benefits. Having achieved K-quarantine through COVID-19, South Korea is expected to proudly demonstrate the success of K-semiconductors in the global semiconductor dominance competition. / Daejeon ? Photo by Jin-Hyung Kang aymsdream@

[Asia Economy Reporter Han Yeju] In the semiconductor ecosystem, which consists of design, foundry, and back-end processes, the importance of "packaging" is growing steadily. As the fine process technology that enhances performance through extremely detailed circuits reaches its limits, global semiconductor companies are positioning packaging as a product differentiation strategy. Taiwan's TSMC and the U.S.'s Intel have already made investments worth trillions of won. Samsung Electronics, which is betting its life on strengthening its foundry business, is also planning investments to increase packaging production capacity.

According to industry sources on the 20th, global semiconductor companies have recently been focusing on packaging processes.

Simply put, packaging means stacking or bundling multiple semiconductors together. In the past, it referred merely to packaging for circuit protection, but now it has emerged as a core technology receiving the most attention. As the limits of semiconductor fine processes restrict the extent of performance improvement, the method of maximizing performance by using multiple chips together has become a notable alternative. The enormous investment cost of trillions of won required each time the unit of fine process, which has currently reached 3 nanometers, is raised is also a background for the growing importance of packaging technology.

The increasing demand for high-performance semiconductors is another reason for the expansion of investment in the packaging field. Big tech companies with service platforms such as Google and Amazon require customized chips optimized for their services and have ventured into direct design. For foundry companies entrusted with contract manufacturing, those with packaging capabilities that can bundle different chips to enhance performance have the opportunity to shake up the market landscape.

The company showcasing the most advanced technology in packaging is undoubtedly Taiwan's TSMC, the number one foundry in the industry. In 2012, TSMC introduced a technology that integrates four chips through Chip on Wafer on technology. TSMC applies packaging technology from the front-end process stage, where circuits are drawn on wafers, rather than connecting completed semiconductors. Because semiconductor manufacturing and packaging are done simultaneously, there is no need for a separate substrate. This allows TSMC to make the package 20% thinner than competitors, reduce power loss by 10%, and improve speed by 20%.

In southern Taiwan, a new semiconductor packaging factory is being built. This factory is expected to mainly handle TSMC's flagship 5-nanometer (nm, one billionth of a meter) semiconductors. The new factory will be TSMC's sixth packaging plant in Taiwan. It already operates four factories and is constructing one more in the northern science park. TSMC is also increasing its connections with Japan, which has high packaging technology capabilities. It is building a packaging research and development (R&D) center at the Ibaraki Prefecture Industrial and Technological Research Institute in Japan with an investment of 37 billion yen (about 400 billion won). Here, TSMC plans to conduct material research for 3D integrated circuits (ICs) that stack three semiconductors.

Intel is considered the company investing most actively in the advanced packaging business sector. Intel plans to invest $4.75 billion (about 6 trillion won) in advanced packaging facilities this year, following a $3.5 billion (about 4 trillion won) investment last year. To secure packaging technology, Intel has invested $3.5 billion (about 4.3 trillion won) to expand its back-end processing plant in New Mexico, USA, and is building packaging factories worth $7 billion (about 8.6 trillion won) and 8 billion euros (about 10.7 trillion won) in Malaysia and Italy, respectively. The scale of packaging facility investments by Intel and TSMC is estimated to account for about 60% of the global total.

Samsung Electronics, which has been evaluated as having a relatively underdeveloped ecosystem including back-end processing, has recently been focusing on packaging investments. Currently, Samsung Electronics possesses 2.5D packaging technology that places logic semiconductors and high-bandwidth memory (HBM) on a flat substrate, and 3D (X-Cube) packaging technology that stacks memory (SRAM) on logic integrated circuits (dies) made with the latest extreme ultraviolet (EUV) process. Additionally, it has introduced a 3.5D packaging process that combines customer-customized ultra-high-performance memory with X-Cube packaging.

This year, Samsung Electronics has accelerated the expansion of packaging production capacity by increasing investments in the packaging line in Cheonan, Chungnam Province. Samsung's dedicated packaging production lines currently operate in three locations: Onyang and Cheonan in Chungnam, and Suzhou in China. Samsung Electronics' DS (semiconductor) division recently established an "Advanced Package Team" through organizational restructuring. This is a specialized organization for researching packaging technology. It was initially formed as a task force (TF) in June, but due to the growing importance of the related field, it was promoted to a formal team in this restructuring. Executive Director Park Cheolmin of the Memory Business Division is in charge.

The semiconductor packaging market is growing by 5% annually and is emerging as a future growth engine for the semiconductor market. Market research firm Gartner predicted that the global packaging market would grow from $48.8 billion (about 55 trillion won) in 2020 to $51.2 billion (about 57 trillion won) in 2021, reaching $57.4 billion (about 64 trillion won) in 2023. There are also forecasts that packaging technology will receive even more attention as 1-nanometer technology becomes mainstream. An industry insider said, "The development of new technologies such as 3D packaging is essential for manufacturing advanced semiconductor chips below the 2-nanometer process. Fierce competition to secure such technologies is expected over the next five years."

This content was produced with the assistance of AI translation services.