SK Hynix "The Secret to Being No.1 in HBM is Know-how from Mass Production Experience and Yield"

Moonpil Park, Vice President of HBM PE at SK Hynix
Revealed at 'SK AI Summit'
"The Core of the HBM Market is
Quality, Yield, and Time to Market"

Park Moon-pil, Vice President in charge of High Bandwidth Memory (HBM) Product Engineering (PE) at SK Hynix, emphasized at the 'SK AI Summit' held at COEX, Seoul on the morning of the 5th, "As important as making HBM well is the ability to produce and supply it stably," and highlighted that the company "achieved the world's first mass production."

Moonpil Park, Vice President in charge of HBM PE (Product Engineering) at SK Hynix [Photo by Yonhap News]

On this day, Vice President Park cited "immense mass production experience and know-how" as the difference between SK Hynix and its competitors as the top supplier.

SK Hynix began delivering the 8-stack HBM3E, the 5th generation of HBM, to Nvidia, a major player in the artificial intelligence (AI) chip market, in March, becoming the first in the industry to do so. Last month, the company started the world's first mass production of the 12-stack HBM3E product and is preparing for shipment in the fourth quarter. It is also known that SK Hynix will supply the 16-stack HBM3E product in the first half of next year and release the 12-stack HBM4 product in the second half of next year.

Vice President Park said, "Controlling these three?quality, yield, and time to market?is the core of the HBM market," adding, "A single defect in the DRAM within HBM can ruin an entire $70,000 AI accelerator system, so the quality level customers demand is extremely high."

SK Hynix has improved quality through internal verification processes and significantly reduced the testing period, which used to take five months per cycle. Through this, the company was able to pass customer quality tests for HBM3E without any issues even once.

Vice President Park stated, "Customer demands for large volumes are intense. Since capacity expansion takes time, securing yield is important," and added, "SK Hynix has optimized this through its extensive mass production experience."

Regarding the roadmap for HBM4, Vice President Park said, "From HBM4 onwards, we expect a coexistence of custom products using Taiwan's TSMC 'logic foundry' and JEDEC standard products," and noted, "Especially in custom HBM, SK Hynix's design assets (IP) and the customer's IP will be integrated into the base die."

Additionally, Vice President Park said, "In custom HBM, customers' desired IP will be embedded, and there will be collaboration in developing the base die and improving quality and yield, leading to optimized memory," emphasizing, "Above all, SK Hynix, Nvidia, and TSMC must strongly drive a 'one team' collaborative relationship from design," proposing the concept of Design for Test (DFT).

This content was produced with the assistance of AI translation services.