SK Hynix Introduces Next-Generation 'HBM4' Performance at NVIDIA Event

NVIDIA Video Presentation at 'GTC 2024'

SK Hynix has revealed detailed performance specifications for HBM4, the next-generation product of high-bandwidth memory (HBM). Compared to HBM3E, which will be actively supplied this year, HBM4 is expected to have 40% increased bandwidth and reduce power consumption to 70% of the current level.

SK Hynix Icheon Campus view / Photo by SK Hynix

On the 18th (local time), SK Hynix introduced the technological level of HBM and detailed specifications of each product through a special video session at NVIDIA's artificial intelligence (AI) developer conference 'GTC 2024' held in San Jose, California, USA.

HBM is a high-performance, high-capacity DRAM that stacks multiple DRAM chips to significantly increase bandwidth. Bandwidth refers to the amount of data that can be transmitted within a certain period, and the larger the bandwidth, the more data can be transmitted quickly.

SK Hynix announced that the upcoming HBM4 will improve in several aspects compared to HBM3E. The company explained that the HBM4 bandwidth will expand by 1.4 times compared to HBM3E, and power efficiency will improve by 0.7 times. The number of stacked DRAM chips will be 16, allowing for a 16-layer HBM4.

To enhance performance, a new 'hybrid bonding' technique will be applied. Hybrid bonding is a manufacturing method where, when stacking DRAM chips, the conductive bumps that allow electricity to pass between chips are removed, and the chips are bonded directly to each other.

SK Hynix also revealed plans to expand the use of HBM. They intend to increase HBM utilization primarily in artificial intelligence (AI) servers and extend it to the automotive market.

Meanwhile, Samsung Electronics has announced plans to launch HBM4 next year. Like SK Hynix, they are developing technology to manufacture HBM4 using the hybrid bonding method.

This content was produced with the assistance of AI translation services.