Samsung Foundry Unveils '2nm' Process Roadmap: "Applied to Mobile from 2025"

Samsung Foundry 2023 Held in Silicon Valley
2025 Mass Production 2nm Roadmap Unveiled
Advanced Package Consortium 'MDI Alliance' Launched

Samsung Electronics has concretized its 2-nanometer (nm; 1 nm = one billionth of a meter) foundry process roadmap. It announced plans to expand mass production to mobile in 2025, high-performance computing (HPC) in 2026, and automotive in 2027. It also explained that the 2 nm process can improve performance by 12% and power efficiency by 25% compared to the latest 3 nm second-generation process.

The Veil of 2 Nanometers Lifted... 8-inch Power Semiconductors Announced

On the 27th (local time), Samsung Electronics held the 'Samsung Foundry Forum 2023' in Silicon Valley, USA. Under the theme of 'Innovation Beyond Boundaries,' it presented various ways to overcome the limits of cutting-edge semiconductors in the AI era. A total of about 700 people, including key customers and partners of the foundry division, attended the event. Thirty-eight partners set up booths at the venue to share the latest foundry technology trends.

Choi Si-young, President of Samsung Electronics Foundry Business, said in his keynote speech, "Many customers are developing AI-dedicated semiconductors optimized for their own products and services," adding, "We will lead the paradigm shift in AI technology by innovating gate-all-around (GAA) transistor technology, which is most optimized for AI semiconductors by expanding the gate area to increase data processing speed and power efficiency."

'Samsung Foundry Forum 2023' Photo by Yonhap News

Samsung Electronics revealed detailed plans and technological levels for the advanced 2nm process, which is scheduled for mass production in 2025. Starting mass production centered on mobile products with the SF2 process, which refers to the 2 nm process, it plans to expand mass production to HPC in 2026 and automotive in 2027. SF2 can improve performance by 12% and power efficiency by 25% compared to SF3 (3 nm second-generation process). The area is reduced by 5%. The 1.4 nm process is scheduled to enter mass production as planned in 2027.

Samsung Electronics will start 8-inch gallium nitride (GaN) power semiconductor foundry services for consumer, data center, and automotive applications in 2025. GaN is a next-generation power semiconductor that overcomes the limitations of existing silicon (Si) semiconductors to maximize system high-speed switching and power savings.

Additionally, to secure preemptive technology for 6th generation mobile communication (6G), Samsung is developing a 5 nm RF (Radio Frequency) process and plans to mass-produce it in the first half of 2025. Introducing this process can increase power efficiency by more than 40% and reduce area by 50% compared to the existing 14 nm process. Samsung also plans to expand the currently mass-produced 8 nm and 14 nm RF processes beyond mobile to various applications such as automotive.

Cleanroom Size to Increase Sevenfold by 2027... Launch of MDI Alliance

Samsung Electronics is pursuing a Shell-First strategy to respond quickly and flexibly to market and customer demands. The Shell-First strategy refers to proactively constructing cleanrooms and securing stable production capacity through flexible facility investments linked to future market demand, actively responding to customer needs. Samsung is currently proactively building semiconductor cleanrooms in Pyeongtaek, Gyeonggi Province, and Taylor, USA. By 2027, the cleanroom size is expected to increase 7.3 times compared to 2021.

Samsung plans to begin full-scale mass production of various application products such as mobile at Pyeongtaek Line 3 in the second half of the year. The Taylor Line 1 under construction in the US will be completed in the second half of this year and fully operational in the second half of next year. Additionally, it plans to expand its production base to Yongin, which is being developed as a national industrial complex. Samsung has decided to build five foundry fabs in the system semiconductor cluster to be established in Yongin.

President Choi Si-young delivering the keynote speech [Photo by Yonhap News]

On the same day, Samsung Electronics announced the launch of the 'Multi-Die Integration (MDI) Alliance,' an advanced packaging consortium, together with global partners in memory, package substrate, and testing fields, who are part of the 'Samsung Advanced Foundry Ecosystem (SAFE).'

The MDI Alliance aims to build an ecosystem for 2.5D and 3D heterogeneous integration packaging technology (packaging technology that allows semiconductors with different functions to operate as one semiconductor), innovate stacking technology, and provide partners with a 'one-stop turnkey service' for advanced packaging, leading the Beyond Moore era that surpasses Moore's Law. In particular, it plans to develop differentiated packaging solutions according to applications such as high-performance computing (HPC) and automotive, satisfying diverse market and customer requirements.

Expanding Partner Ecosystem to Capture Diverse Customers

On the 28th (local time), Samsung Electronics will also hold the 'SAFE' forum under the theme 'Accelerating the Pace of Innovation.' The SAFE forum is an event where Samsung foundry customers and partners gather to share advanced foundry technologies and trends. Through this event, Samsung provides opportunities for partners in various fields to explain their solutions and discuss collaborations. Along with over 100 SAFE partners, it pursues the common goal of 'customer success.'

Samsung supports building sustainable relationships among partners. Through this, it is advancing the product design infrastructure of fabless customers from 8-inch processes to the latest GAA processes. Twenty-three Samsung foundry electronic design automation (EDA) partners provide more than 80 electronic design tools. Ten semiconductor package and test outsourcing (OSAT) partners are focusing on developing solutions necessary for 2.5D and 3D package design.

Furthermore, Samsung supports product design services to various customers not only through nine design solution partners (DSPs, companies that optimize fabless design layouts for foundry processes) with high understanding of Samsung foundry processes but also through nine cloud partners.

Samsung Electronics Pyeongtaek Campus / [Photo by Samsung Electronics]

Samsung Electronics has secured 50 global semiconductor intellectual property (IP) partners and more than 4,500 IPs (design blocks that implement specific semiconductor functions as circuits, necessary for design). High-speed interface IPs for SF2, such as low-power double data rate (LPDDR) 5x and high bandwidth memory (HBM) 3P, are planned to be secured by the first half of next year. Samsung is promoting long-term cooperation with IP partners to meet the broad demands of AI, HPC, and automotive customers and is pursuing collaboration with multiple partners for each IP.

Kye Gyeong-wook, Vice President of Samsung Electronics Foundry Business, said, "By cooperating with SAFE partners, we are minimizing the increasing design complexity due to the introduction of advanced processes and heterogeneous integration technologies," adding, "We will achieve both quantitative and qualitative growth of the SAFE ecosystem through this forum and support customers' innovation and success."

Samsung Electronics will hold the 'Samsung Foundry Forum' and 'SAFE Forum' in Korea on the 4th of next month. In the second half of the year, it plans to hold Samsung Foundry Forums in Europe and Asia, introducing region-specific customer-tailored solutions.

This content was produced with the assistance of AI translation services.