Samsung Electronics Supports Virtual Chip Design Environment for Small Fabless Companies..."Expanding the Semiconductor Ecosystem"

'Integrated Cloud Design Platform' Support
Enabling Semiconductor Chip Design Anytime, Anywhere

Samsung Electronics employees are conducting user training for the 'Integrated Cloud Design Platform (SAFE-CDP)' targeting employees of the domestic fabless company 'Gaonchips'.

[Asia Economy Reporter Dongwoo Lee] Samsung Electronics will provide a cloud design platform to small and medium fabless (semiconductor design-specialized) companies to strengthen domestic system semiconductor competitiveness. The company plans to lead the enhancement of competitiveness in the domestic semiconductor industry by offering a virtual design environment that enables immediate chip design anytime and anywhere.

On the 18th, Samsung Electronics announced the launch of the 'Integrated Cloud Design Platform (SAFE-CDP)' to help domestic fabless customers create a convenient semiconductor design ecosystem.

SAFE-CDP was jointly developed by Samsung Electronics and Rescale, a cloud high-performance computing (HPC) platform company. This service supports running software from automated design software companies such as Ansys, Mentor, Cadence, and Synopsys on a public cloud. The key feature is that customers can start chip design immediately from anywhere without location restrictions as long as they have an idea.

Samsung Electronics explained that by using 'SAFE-CDP,' customers can reduce investment burdens related to server expansion and flexibly use computing resources required for chip design and verification tasks according to each stage. This significantly reduces the computing resources and chip verification time that increase in the later stages of design, especially as semiconductor chip design becomes more complex and difficult with finer processes.

In fact, Samsung Electronics stated that the domestic fabless company 'Gaonchips' shortened its design period by about 30% by using SAFE-CDP to design automotive semiconductor chips. It is also known that small and medium domestic companies such as ADT and Hanatech have expressed their intention to use SAFE-CDP. They believe that reducing the time and investment costs compared to building their own servers allows them to design more competitive semiconductor products.

Along with this, Samsung Electronics plans to strengthen win-win cooperation by providing technical education on layout, design methodology, and verification to domestic fabless companies and design houses since the announcement of the 'System Semiconductor Ecosystem Strengthening Plan' last year.

The Multi-Project Wafer (MPW) program, essential for product development activities of small and medium fabless companies, will be expanded to operate 3 to 4 times annually per process, supporting not only 8-inch (200mm) but also 12-inch (300mm) wafers to utilize cutting-edge processes. Additionally, optimized process technologies and design infrastructure for various applications such as automotive, mobile, and security will be provided, with plans to begin full-scale mass production of products developed in cooperation with small and medium companies from the end of this year.

Jae-hong Park, Vice President of the Foundry Business Division at Samsung Electronics’ Device Solutions Division, said, "Samsung Electronics’ integrated design platform, launched together with Rescale, will be an important foundation for the fabless industry to transition to a cloud-based design environment," adding, "We will continue to contribute to enabling customers to launch innovative products through strengthening the foundry ecosystem."

This content was produced with the assistance of AI translation services.