"Timely Supply of Customer Demands" HBM Packaging Leader SK Hynix Vice President Awarded Dongtapsan Industry Medal

SK Hynix Newsroom Interview

Choi Woo-jin, Vice President in charge of P&T at SK Hynix, responsible for the development and mass production of High Bandwidth Memory (HBM) packaging technology, stated through the company newsroom on the 19th, "The most important factor in the development and mass production of HBM is Time to Market," adding, "We must prepare technologies that can respond swiftly to market conditions."

Vice President Choi first introduced MR-MUF (Molded Resin-Metallic Underfill) technology in the 3rd generation HBM2E in 2019. The MR-MUF technology used by SK Hynix involves stacking DRAM chips, injecting a liquid protective material between each chip, and applying heat to securely connect and fix the chips. This technology contributed to improving heat dissipation and durability while enhancing production yield. Vice President Choi further advanced the MR-MUF technology by developing the 'Advanced MR-MUF' technology, leading to the successful mass production of the 4th generation HBM3 12-layer and 5th generation HBM3E.

On the 7th, Vice President Choi received the Bronze Tower Industrial Medal at the 48th National Productivity Awards. He was recognized for his contributions to innovating HBM packaging technology, solving heat and pressure issues, and dramatically improving production yield and quality.

Vice President Choi said, "Quickly understanding and responding to market conditions and customer demands is fundamental," and added, "The reason SK Hynix has been able to lead the AI memory market through HBM is precisely because of this preparation." To respond to the rapidly changing semiconductor industry influenced by AI, he focused on increasing organizational flexibility. Instead of the traditional top-down approach, he introduced a horizontal decision-making structure that actively reflects the opinions of field experts and practitioners.

Choi Woo-jin, Vice President in charge of P&T (Package & Test) at SK Hynix. Photo by SK Hynix

To overcome the semiconductor market downturn that began in 2022, Vice President Choi joined the downturn task force (TF), expanded the production of premium product lines, improved process efficiency, and devised cost reduction measures. Additionally, as AI memory demand surged since last year, he succeeded in more than doubling HBM output compared to before by adjusting production between processes without additional investment.

When supply chain instability increased due to the US-China trade conflict and Japan’s export restrictions, Vice President Choi led localization projects. In 2019, together with packaging sector partners, he developed domestically produced equipment at the industry's highest level and localized items with high overseas dependency such as plating solutions and bonding materials. This contributed not only to SK Hynix but also to enhancing the overall supply chain stability of the domestic semiconductor industry.

The P&T (Package & Test) organization led by Vice President Choi is responsible for packaging and testing, which are post-processes in semiconductor manufacturing. They package wafers that have completed front-end processes at the fab into product forms usable by customers and test whether the quality meets customer requirements to ensure reliability. Packaging technologies such as MR-MUF and TSV (Through Silicon Via), which connects chips vertically by drilling micro-holes in DRAM, are core to SK Hynix’s HBM competitiveness.

Finally, Vice President Choi said, "I hope everyone always keeps in mind the inflection points that occur after productivity improvements and technological innovations and deeply considers quality enhancement until the very end," adding, "We must demonstrate the strength proven through HBM, go beyond that, and maintain the basics of technology and quality while showing a spirit of challenge."

This content was produced with the assistance of AI translation services.