[Peace&Chips] The Trend is 'Post-Processing'... Heat Rises in Package Technology Development

Post-Processing Gaining Importance Equal to Pre-Processing
Product Performance Doubles with Package Technology Alone
Active Industry Development in 3D Stacking, Chiplets, and More

Editor's NoteSemiconductors, often called the rice of modern industry. Although it's a term we hear every day, it's hard to explain when asked. Peace & Chips will make the complex concepts and overall flow of the semiconductor industry easy to digest for you. Just place your spoon.

Last November, Samsung Electronics introduced a new graphics D-RAM product. The product is named 'GDDR6W' and attracted industry attention at the time of its release. It's not just because it's a new product. It was a product that significantly enhanced performance using next-generation packaging technology.

Packaging, simply put, refers to stacking or combining multiple semiconductor chips. It is created during the back-end process of semiconductor manufacturing. While the front-end process involves drawing circuits on a circular wafer to complete the blueprint of numerous semiconductor chips (dies), the back-end process includes cutting the wafer into chip units and packaging them into finished products that conduct electricity. Testing is also performed at this stage to ensure there are no defects in the chips.

Semiconductor chip (die) produced on a wafer / [Image source=SK Hynix]

To launch GDDR6W, Samsung Electronics utilized 'Fan-Out Wafer Level Packaging (FOWLP)' technology. FOWLP is a technique where dies are stacked directly on the wafer without using a printed circuit board (PCB) during packaging. Since the PCB space is omitted inside the package, there is more room to include additional chips. This is why GDDR6W doubled its performance and capacity compared to the existing product (GDDR6) despite having the same package size.

In this way, the semiconductor industry has recently been focusing on developing back-end process technologies to enhance product performance. This is because, given the same effort, the results from the back-end process are expected to be greater. Front-end process technology has already reached a considerable level, making it difficult to introduce significantly advanced technologies in this field. On the other hand, the back-end process has received relatively less attention, meaning there is much room for exploration.

Comparison image of GDDR6 and GDDR6W packages. GDDR6W enhances performance by adding chips in the space excluding the PCB. /
[Image source=Samsung Electronics Newsroom]

The industry has recently shown interest in various packaging technologies. A representative example is the three-dimensional (3D) stacking technology that vertically stacks semiconductor dies. Another technology gaining attention is chiplet technology, which bundles chip fragments designed and manufactured through different processes into a single package. Intel even formed a consortium (UCIe) with multiple companies such as Samsung Electronics, TSMC, and ARM to develop chiplet technology.

The component industry is also busy keeping pace with these trends. Samsung Electro-Mechanics and LG Innotek are seriously expanding their 'Flip-Chip Ball Grid Array (FC-BGA)' business. FC-BGA is a next-generation semiconductor substrate that connects semiconductor chips to the main board. Since it supports high-density packaging technology, the related market is expected to grow significantly in the future.

This article is from [Peace & Chips], published weekly by Asia Economy. By clicking subscribe, you can receive articles for free.

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This content was produced with the assistance of AI translation services.