Nepes Announces Entry into Global SiP Market: "We Will Lead the Semiconductor Market"

Introduction to Endfab-Based 'nSiP' Technology Strategy

[Asia Economy Reporter Kim Bo-kyung] Nepes has announced a strategy to lead the global semiconductor market by leveraging differentiated technology.

On the 27th, Nepes held an online 'nTech Forum' and introduced its next-generation semiconductor process technology strategy based on end-fab 'nSiP,' which is gaining attention.

SiP is a multi-chip packaging solution that combines individual chips into one, essentially a type of multi-chip module. 73% of the main components in smartphones are made using SiP.

The global SiP market size reached $14.6 billion last year. Over 90% of this market uses traditional methods applying components such as substrates and wires.

However, with the rapid growth of 5G mobile communications, artificial intelligence (AI), and autonomous vehicle markets, Nepes expects the adoption of end-fab technology-based nSiP, which can implement high-performance, highly integrated modules, to increase.

Nepes' proprietary technology, nSiP, is Korea's first SiP solution that applies fan-out wafer-level packaging (FOWLP) technology directly on silicon wafers without using substrates. Compared to packages using substrates and wires, it can reduce the size to less than one-third.

Going a step further, Nepes secured price competitiveness by maximizing production efficiency through a panel-level packaging (PLP) process using 600*600 mm square panels.

According to market research firm Yole, the overall SiP market is expected to grow to $18.8 billion by 2025 in mobile, automotive, and HPC application areas, with an average annual growth rate of 6%.

Kim Jong-heon, Executive Director of Nepes CTO Office, stated, "End-fab based nSiP has secured global competitiveness in size and performance, and by implementing this on PLP, we will present a new SiP roadmap to the market."

This content was produced with the assistance of AI translation services.