Silicon Mitus Launches Next-Generation Power Management Chip for LPDDR5

[Asia Economy Reporter Hyungsoo Park] Silicon Mitus, a power semiconductor specialist, announced on the 12th that it has launched a power management chip (PMIC) for LPDDR5.

LPDDR5 is the next-generation low-power memory following LPDDR4, used in various portable devices such as laptops, tablets, and smartphones. LPDDR5 can adjust its operating speed according to usage to reduce power consumption and minimizes power consumption in standby mode.

The power management chip for LPDDR5 plays a role in properly converting, distributing, and controlling the power supplied to LPDDR5.

The power semiconductor developed by Silicon Mitus can increase or decrease voltage and adjust operating speed during operation. It supplies appropriate voltage in real-time according to the operating state. The lowest output voltage is 0.3V, which is lower than the competitor’s product at 0.4V.

Considering that the required current varies depending on server capacity, the SM582x series provides customized chips according to the required current. Currently, the SM582x series supports 1.5A, 3.0A, and 4.5A.

Compared to existing products, it minimizes wasted power through more than 5% higher efficiency, and users can configure the chip to operate as desired. The company explained that user options are provided.

Kim Donghan, Executive Director of Silicon Mitus’s Mobile Division, said, "In response to the rapidly growing memory market demand, we will supply power management chip product lines tailored to customer needs not only for LPDDR but also for SSD, NAND flash, and DDR markets."

This content was produced with the assistance of AI translation services.